SparkEDA : Design Verification Solutions

SparkEDA Inc develops and markets innovative Electronic Design Automation Tools for hardware design teams. Our mission is to provide hardware designers with efficient design verification methodology and tools to improve the design verification process and to eliminate critical design bugs.

PANDA Formal Verifier  employs the state-of-the-art formal verification technology to exhaustively verify RTL code without simulation or test vectors. Unlike existing formal verification solutions, Panda Formal Verifier shares the same testbench with Dynamic Simulation, significantly saving development and debugging efforts. Complemented with dynamic simulation, Panda Formal Verifier significantly improves block-level design verification quality.

ASTRA Tool Suite assists Designers and Veriifcation Engineers at generating machine-readable design and verification code directly from specification diagrams. ASTRA Tool Suite generates synthesizable RTL, assertions, functional coverage, constraint-random models as well as test scenarios. ASTRA Tool Suite also generates comprehensive documentation to guarantee constant synchronization between specification documents and corresponding design and verification code. ASTRA Tools Suite consists of three tools: ASTRA Wave, ASTRA State and ASTRA Tests.

COVERIS Functional Coverage Manager introduces Functional Coverage Collection and Management for Verilog and VHDL simulations. In addition to Functional Coverage collection and Management, Coveris introduces highly configurable statistical checks for both design and verification domains. With Coveris, designers and verification engineers gain access to modern coverage-based verification technologies without access to Systemverilog and Systemverilog-enabled simulators.

Please contact SparkEDA Inc for more information about our Products and Professional Services.